1. Field of the Invention
The present invention relates to a method for manufacturing a device separation region for semiconductor device and more particularly, to a method for manufacturing a device separation region for a semiconductor device which realizes large scale integration with high reliability.
2. Description of the Prior Art
In general, during a process of manufacturing semiconductor devices, the semiconductor devices which locate adjacently are separated electrically with each other. This is to prevent an operating error, when the semiconductor devices are operated. There are several methods to separate the semiconductor devices electrically. One of the most familiar methods to one who is skilled in the art is Local oxidation of silicon (hereinafter referred as LOCOS) method. In LOCOS method, a silicon substrate is oxidized selectively to form a device separation region.
Details of the LOCOS method will be described below based on the figures. Initially, a silicon oxide layer 2 is formed on a substrate 1 by thermal oxidation. Then, a silicon nitride layer is formed on the silicon oxide layer 2 as a first silicon nitride layer 3.
Subsequently, a photo resist layer 8 is formed at a predetermined position on the first silicon nitride layer 3 (FIG. 1A). After forming the photo resist layer 8, the first silicon nitride layer 3 is removed partially by chemical etching by utilizing the photo resist layer 8 as a mask. Then, boron is implanted ionically into the substrate 1 where the first silicon nitride layer 3 is removed (FIG. 1B).
After implantation of boron, the photo resist layer 8 is removed by chemical etching and the surface of the substrate 1 is oxidized. In this way, the bulk of the silicon oxide layer 2 is increased by carrying out thermal oxidization thereto. Since the first Silicon nitride layer 3 has a characteristic that it is hard to oxidize, the part of the silicon oxide layer 2 covered by the first silicon nitride layer 3 does not increase its' bulk. Under this condition, a field oxidation (device separation) layer is formed as a device separation layer 10 in predetermined thickness t by carrying out thermal oxidation at a desired position (see FIG. 1C).
However, once the device separation layer 10 is formed in predetermined thickness t, the device separation layer 10 also grows in the horizontal direction HZ100 toward the surface of the substrate 1. That is, as a result of growth for the device separation layer 10 in the shape of beak of a bird, so called "Bird's beak" (to one who skilled in the art) BB1 is formed in the first nitride layer 3. That is, edges of the device separation layer 10 extend into the region of the first silicon nitride layer 3 (FIG. 1C).
After forming the device separation layer 10, both the first silicon nitride layer 3 and the silicon oxide layer 2 are removed by chemical etching. As a result, as it is shown in FIG. 2A, the device separation layer (device separation region) 10 and a device formation region 15 are formed on the substrate 1.
Subsequently, there will be described a function of the device separation region 10 formed by LOCOS method. For example, when writing a data into a semiconductor device such as memory, an high voltage is applied to the semiconductor device through a conductive layer (not shown) formed on the device separation region 10. In an assumption, for instance, an high voltage is applied to a semiconductor device (not shown) formed on the device formation region 15 on the substrate 1, to write a data therein (see FIG. 2A).
When the high voltage for writing a data is applied to a semiconductor device through the conductive layer, the high voltage is also applied to the substrate 1. The high voltage applied to the substrate 1 turns polarity of surface OS1 in the substrate 1 where it faces the device separation region 10. Turn of polarity of the surface OS1 increases a possibility of making a channel CH1 between the semiconductor device and an adjacent semiconductor device both of which are formed on the device formation region 15 (see FIG. 2A). In order to prevent making the channel CH1, as well as preventing bad influences such as writing a data to the adjacent semiconductor device erroneously (see FIG. 2B), the device separation region 10 is formed to thickness t.
That is, the device separation region 10 formed to thickness t prevents making the channel CH1 between the semiconductor device and the adjacent semiconductor device. In that way, the device separation region 10 is able to prevent erroneous data writing to the adjacent semiconductor device.
However, when forming the device separation region 10 under the conventional method, the bird's beak BB1 is formed because the device separation layer 10 has grown in the horizontal direction HZ100 toward surface of the substrate 1 (FIG. 1C, FIG. 2B). Once the bird's beak BB1 is formed in the substrate 1, the device formation region 15 is narrowed by width W (FIG. 2B, FIG. 3B). That is, to form the device separation region 10 in predetermined thickness which is necessary to separate semiconductor devices electrically, the device separation region 15 is narrowed. As a result, density of integration for the semiconductor devices formed in the substrate 1 is decreased.
Thus, the device separation region (silicon oxide layer) 10 is formed in predetermined thickness t for stable electrical separation of the devices (see FIG. 2B). The thickness t of the device separation region 10 is formed by rapid expansion in the implanted portions of boron, when carrying out thermal oxidation to the substrate 1. Therefore, the device separation region 10 has a steep slope to the surface of the substrate 1 (see FIG. 3A). When a thin layer (for instance aluminum layer 25) is formed on the device separation region 10 as a wiring layer, the aluminum layer 25 is not able to be formed uniformly thereon, due to the steepness of the layer. That is, thickness of the aluminum layer 25 located on top of the device separation region 10 (as thickness TH1) and thickness of the aluminum layer 25 located on the slope of the region (as thickness TH2) are different from each other (see FIG. 3A). Therefore, it is not possible to form a layer on the device separation region 10 uniformly, so that reliability of the semiconductor devices is decreased through low coverage and disconnection of the layer located on the region.